The HDI Market
The Birth of the Microvia
Beginning in the late 1980s and early 1990s, the electronics market underwent a very significant change. Advancement in semiconductor technology gave rise to the digital revolution. Personal computing evolved to provide users with a higher level of functionality and integration was key in the move to portability of desktop models. Applications that were traditionally mechanical, such as cameras, were redesigned to incorporate electronics.
Mobile computing allowed users the fl exibility of working from remote locations, a very attractive idea in many occupations. This freedom, however, resulted in an almost immediate concern with weight and size. Designers searched for ways to reduce the weight of the machines and to make the physical outlines sleek and portable. This quest for smaller, thinner, and lighter machines would become the focus for a growing number of applications over time.
The demand for integrated circuits increased. Surface mount technology (SMT) packaging, introduced in the late 1970s, was rapidly replacing pin-in-hole packages as seen in Figure 1.
SMT eliminated the need for the large through-holes (THs) required for pinned components and reduced the mounting area needed on the circuit board. However, the expanding area needed on the circuit board. However, the expanding use of SMT components created challenges in the design of printed circuit boards (PCBs). The small through-vias utilized for interconnection increased drilling cost and caused plating issues. Although the smaller components allowed designers to put more components in a given footprint, this resulted in PCB routing challenges which drove layer count up in many applications.
Further complicating the matter was the introduction of area array packaging. BGAs offered the promise of a smaller footprints than pinned packages and could accommodate high I/O devices. CSPs delivered the smallest form factor. Both increased the solder joint density on circuit boards and drove the need for a high-density interconnect.
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